The present invention relates to an information transfer control system and, more particularly, to a system for controlling the information transfer by using a first-in/first-out stack.
In general, an information processor such as a minicomputer or a microcomputer employs a first-in/first-out stack (hereinafter termed simply FIFO) having a buffering function, as an interface for information transfer.
A conventional information transfer system with the FIFO stack is shown in FIG. 1. In the figure, reference numeral 11 designates a data processor, 12 an input/output (I/O) device, 13 a first FIFO stack providing an information transfer from the processor 11 to the I/O device 12 and 14 a second FIFO stack providing an information transfer from the I/O device 12 to the information processor 11. The information transfer between the processor 11 and the I/O device 12 is generally bidirectional. Nevertheless, the conventional FIFO stack has an ability of only one-way information transfer, and is ineffective in controlling the direction of the information transfer from exterior. It is for this reason that the conventional information transfer control system as shown in FIG. 1 needs a pair of FIFO stacks between the data processor 11 and the input/output device 12. Further, in the conventional one, it is impossible to concurrently transfer the input and output information between the data processor 11 and the input/output devices 12. Therefore, the FIFO stacks 13 and 14 never operate concurrently but alternately operate with a time interval. This means that the use of one of the FIFO stacks is shortened in time, thus resulting in reduction of the use efficiency of the FIFO stack.